1. Field of the Invention
The present invention relates to a packet processing apparatus and a packet processing method which permit an increase in packet transmission speed while maintaining high reliability.
2. Description of the Related Art
Packet processing apparatuses such as routers which perform packet transmission processing using Internet protocols (IPs) or the like generally include packet processing engines and searching engines. When performing packet transmission processing, the packet processing apparatuses perform search processing on the basis of address information contained in the headers of packets and information on data contents, thus determining transmission destinations and transmission control information. Devices such as network processors (NWPs) are applied in the packet processing engines, and devices such as content-addressable memories (CAMs) are applied in the searching engines which search transmission destinations and transmission control information on the basis of packet information.
When performing search processing, a packet processing engine provides a search engine with a portion of a packet as a search key necessary for processing such as address determination or filtering. Upon receiving search result information from the search engine, the packet processing engine performs postprocessing on the basis of the search result information so as to send out the packet.
A network processor applied in the packet processing engine can be a RISC (Reduced Instruction Set Computer)-type processor or a data-flow-type processor. However, although RISC-type processors are capable of handling complex processing, necessary processing time increases with increasing complexity of processing, thus resulting in degradation of performance. On the other hand, with data-flow-type network processors, processing speed can be increased more easily compared with the RISC-type processors, and processing performance is not dependent on the types of packet. However, data-flow-type processors have limited capability in terms of the amount of processing which can be performed for one packet, and therefore are not capable of complex processing.
The recent development of high-speed data transmission of several Gbps or more has lead to the necessity of an increase in the processing speed of devices such as routers for performing packet transmission processing. For example, Japanese Unexamined Patent Application Publication No. 2004-015561 describes a packet processing apparatus provided with a search engine having an associative memory, a first processor serving to process packets before the packets are sent to the search engine, and a second processor serving to perform relay processing on the packets on the basis of search result information obtained from the search engine. As another example, Japanese Unexamined Patent Application Publication No. 2004-158903 describes a packet processing apparatus in which each of a plurality of incoming packets is appended with a sequence number and the individual packets are distributed across a plurality of packet analyzing means. Each of the plurality of packet analyzing means parallelly analyzes the distributed packet, and the analyzed packets are rearranged in the original order on the basis of the sequence numbers.